We are looking for a skilled design engineers to architect and oversee interfacing our low-speed interfaces to our high-speed interconnect. These blocks include Boot logic, Serial Interfaces, and debug logic
Responsibilities
- Working with a small team to implement, debug, and verify Prodigy’s internal and external buses
- Building the infrastructure needed to bringup and debug the various components in FPGAs and silicon
- Working with the software team to create and verify drivers and models needed
Qualifications
- Requires 8-15 years of applicable experience (bright individuals with fewer years experience would be considered)
- Experience with integration and debug of APB, AHB, and AXI interconnects
- Development of internal logic analyzers and profilers
- Must have Verilog / SystemVerilog / Synthesis / STA / Lint experience
Compensation Range
The base salary range is $125,000 to $200,000. Your salary will be determined based on your experience and specific skillset.
You will also be eligible for equity and benefits.
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關於Tachyum
Tachyum正在通過其最近推出的旗艦產品改變人工智能、高性能計算、公共和私有云數據中心市場。 Prodigy神童是世界上第一款通用處理器，將CPU、GPGPU和TPU的功能統一到一個處理器中，為專業和通用計算提供行業領先的性能、成本和能效。當在超大規模數據中心配置Prodigy神童處理器時，它們使所有人工智能、高性能計算和通用應用程序能夠在一個硬件基礎設施上運行，每年為公司節省數十億美元。