位置
工作領域
位置 | 細節 | ||
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Senior Linux EngineerBe responsible for designing and maintaining our existing and new Linux infrastructure | IT |
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Compiler EngineerPort and maintain compilers (GCC, LLVM, Go) on new platform with new computational mechanism | 軟件 |
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OS Kernel EngineerDesign, develop, port, maintain, test, debug, optimize, secure, and evaluate OS Kernel and system software | 軟件 |
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Senior Design Engineer – Coherent InterconnectBuild the infrastructure to support bringup and debug in FPGAs and silicon | Systems Engineering |
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Senior Design Engineer – Coherent Interconnect (California)Build the infrastructure to support bringup and debug in FPGAs and silicon | Systems Engineering |
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Senior Design Engineer – PCIe InterfaceBuild the infrastructure to support PCIe during FPGA emulation and bringup | Systems Engineering |
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Java JIT Compiler EngineerPort Java Virtual Machine to new architecture | 軟件 |
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Student Software DeveloperCreate C/C++, Assembler programs to validate compiler capabilities and effectiveness | 軟件 |
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AI and Machine Learning Algorithms Architect / ResearcherAnalyze algorithmic and architecture options to find the optimal design points | 人工智能 |
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AI and Machine Learning Algorithms Architect / Researcher (California)Analyze algorithmic and architecture options to find the optimal design points | 人工智能 |
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BMC SW engineer | 軟件 |
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Build and Release Engineer (Linux)Oversee and ensure build and release timeline. | 開發運維 |
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CPU Performance EngineerContribute to architectural planning and design with development engineers | Physical Design |
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Design Verification EngineersWe are looking for talented Verification Engineers to expand our International Design Verification team. | Design Verification |
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Design Verification Engineers (California)We are looking for talented Verification Engineers to expand our International Design Verification team. | Design Verification |
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Digital Design EngineerWork on the state-of-art AI processor architecture. | Physical Design |
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Linux Kernel EngineerDrive and deliver Linux on new platform with new proprietary computational mechanism | 軟件 |
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Linux Kernel Networking Specialist (drivers)Create, adjust and maintain various specific network Linux Kernel drivers. | 軟件 |
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LLVM Compiler EngineerPort LLVM on new platform with new computational mechanism. | 軟件 |
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Physical Design EngineerWork with RTL designers to achieve PPA goals and suggest appropriate tradeoffs | Physical Design |
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Physical Design Engineer (California)Work with RTL designers to achieve PPA goals and suggest appropriate tradeoffs | Physical Design |
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Product Marketing Manager – SlovakiaWork with corporate marketing to provide product and technical information and positioning | 市場 |
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Senior ASIC Logic & Physical Design EngineerDrive and deliver gate level netlist and placement in line with new computational mechanism | Physical Design |
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Senior ASIC Logic & Physical Design Engineer (California)Drive and deliver gate level netlist and placement in line with new computational mechanism | Physical Design |
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Senior Design Engineer - High Speed CacheWork on high performance L2 Cache unit serving the needs of state-of-the art AI processing elements. | RTL |
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Senior Design Engineer - High Speed Cache (California)Work on high performance L2 Cache unit serving the needs of state-of-the art AI processing elements. | RTL |
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Senior Design Engineer – CPU Execution UnitWork on Execution Unit. | RTL |
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Senior Design Engineer – CPU Execution Unit (California)Work on Execution Unit. | RTL |
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Senior Design Engineer – CPU Fetch UnitWork on state-of-the art Fetch Unit architecture design serving both general purpose as well as AI processing element needs. | RTL |
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Senior Design Engineer – CPU Fetch Unit (California)Work on state-of-the art Fetch Unit architecture design serving both general purpose as well as AI processing element needs. | RTL |
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Software EngineerPlay a critical role in porting open source packages to our processor platform, the new chip being designed by Tachyum | 軟件 |
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Technical Support & Field Application EngineerSupport Tachyum customers and potential customers to easily use and adopt our emulation systems | 軟件 |
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Toolchain EngineerPlay a critical role in development of debugging tools for the new chip being designed by Tachyum. | 軟件 |
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UEFI Developer | 軟件 |
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Senior Design Architect - InterfaceSpecify, design, and deliver a high-speed chip-to-chip interface | RTL |
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Senior Design Architect - Interface (California)Specify, design, and deliver a high-speed chip-to-chip interface | RTL |
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Senior Design Engineer – Memory SubsystemInterface and enhancements of an advanced DRAM control block | RTL |
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Test Engineer / Test Automation EngineerCreate, analyze, and implement software test plans and strategies. | 測試 |
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Junior Linux Kernel developerImplement new or optimize the old features in Linux Kernel. (suitable also for talented graduates) | 軟件 |
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GCC Compiler EngineerDrive and deliver GCC on new platform with new computational mechanism | 軟件 |
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GCC Compiler Engineer (California)Drive and deliver GCC on new platform with new computational mechanism | 軟件 |
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關於Tachyum
Tachyum正在通過其最近推出的旗艦產品改變人工智能、高性能計算、公共和私有云數據中心市場。 Prodigy神童是世界上第一款通用處理器,將CPU、GPGPU和TPU的功能統一到一個處理器中,為專業和通用計算提供行業領先的性能、成本和能效。當在超大規模數據中心配置Prodigy神童處理器時,它們使所有人工智能、高性能計算和通用應用程序能夠在一個硬件基礎設施上運行,每年為公司節省數十億美元。