Senior Design Engineer – Coherent Interconnect

位置:

  • 斯洛伐克布拉迪斯拉发
  • Brno, CZ

工作领域:

  • 硬件
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What You’ll be Doing

  • Working with a small team to implement, debug, and verify a high-performance coherence management system
  • Build the infrastructure to support integrity testing and debug on emulation system

Skills Required

  • Requires 10 to 15 years of applicable experience (bright individuals with lower experience can also apply)
  • Experience and background with multicore coherence
  • Familiarity microprocessor cache systems
  • Experience with embedded logic analyzers is a plus
  • Verilog / System Verilog / Synthesis / STA / CDC / Lint experience

Benefits

  • Competitive salary and benefits package.
  • Opportunities for professional development and advancement.
  • International environment and further career progression.
  • Getting in touch with bleeding edge technology.
  • Flexible working hours
  • Work-life balance.
  • Collaborative and supportive work environment.

If you meet the qualifications and are interested in this opportunity, please submit your resume and cover letter. We look forward to hearing from you!

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