We are looking for a few high-talent contributors to add to the Tachyum team. Please, take a look at our currently available career opportunities below. You can read the full job description and submit your resume by filling out the form at the bottom.
We’d love to hear from you!
位置
工作领域
位置 | 细节 | ||
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Compiler EngineerPort and maintain compilers (GCC, LLVM, Go) on new platform with new computational mechanism |
软件 |
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OS Kernel EngineerDesign, develop, port, maintain, test, debug, optimize, secure, and evaluate OS Kernel and system software |
软件 |
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更多信息 |
Senior Design Engineer – Coherent InterconnectBuild the infrastructure to support bringup and debug in FPGAs and silicon |
Systems Engineering |
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更多信息 |
Senior Design Engineer – Coherent Interconnect (California)Build the infrastructure to support bringup and debug in FPGAs and silicon |
Systems Engineering |
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更多信息 |
Senior Design Engineer – PCIe InterfaceBuild the infrastructure to support PCIe during FPGA emulation and bringup |
Systems Engineering |
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Recruiting Specialist - Talent AcquisitionPartner with business and engineering leaders to assess the company’s talent requirements and advise on the best hiring strategy in Slovakia, EU and the US |
人力资源 |
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Java JIT Compiler EngineerPort Java Virtual Machine to new architecture |
软件 |
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Student Software DeveloperCreate C/C++, Assembler programs to validate compiler capabilities and effectiveness |
软件 |
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AI and Machine Learning Algorithms Architect / ResearcherAnalyze algorithmic and architecture options to find the optimal design points |
人工智能 |
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AI and Machine Learning Algorithms Architect / Researcher (California)Analyze algorithmic and architecture options to find the optimal design points |
人工智能 |
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更多信息 |
BMC SW engineer
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软件 |
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Build and Release Engineer (Linux)Oversee and ensure build and release timeline. |
开发运维 |
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CPU Performance EngineerContribute to architectural planning and design with development engineers |
Physical Design |
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更多信息 |
Design Verification EngineersWe are looking for talented Verification Engineers to expand our International Design Verification team. |
Design Verification |
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更多信息 |
Design Verification Engineers (California)We are looking for talented Verification Engineers to expand our International Design Verification team. |
Design Verification |
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更多信息 |
Digital Design EngineerWork on the state-of-art AI processor architecture. |
Physical Design |
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更多信息 |
Linux Kernel EngineerDrive and deliver Linux on new platform with new proprietary computational mechanism |
软件 |
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Linux Kernel Networking Specialist (drivers)Create, adjust and maintain various specific network Linux Kernel drivers. |
软件 |
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LLVM Compiler EngineerPort LLVM on new platform with new computational mechanism. |
软件 |
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更多信息 |
Physical Design EngineerWork with RTL designers to achieve PPA goals and suggest appropriate tradeoffs |
Physical Design |
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Physical Design Engineer (California)Work with RTL designers to achieve PPA goals and suggest appropriate tradeoffs |
Physical Design |
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Product Marketing Manager – SlovakiaWork with corporate marketing to provide product and technical information and positioning |
市场 |
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Senior ASIC Logic & Physical Design EngineerDrive and deliver gate level netlist and placement in line with new computational mechanism |
Physical Design |
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Senior ASIC Logic & Physical Design Engineer (California)Drive and deliver gate level netlist and placement in line with new computational mechanism |
Physical Design |
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Senior Design Engineer - High Speed CacheWork on high performance L2 Cache unit serving the needs of state-of-the art AI processing elements. |
RTL |
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更多信息 |
Senior Design Engineer - High Speed Cache (California)Work on high performance L2 Cache unit serving the needs of state-of-the art AI processing elements. |
RTL |
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更多信息 |
Senior Design Engineer – CPU Execution UnitWork on Execution Unit. |
RTL |
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更多信息 |
Senior Design Engineer – CPU Execution Unit (California)Work on Execution Unit. |
RTL |
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更多信息 |
Senior Design Engineer – CPU Fetch UnitWork on state-of-the art Fetch Unit architecture design serving both general purpose as well as AI processing element needs. |
RTL |
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更多信息 |
Senior Design Engineer – CPU Fetch Unit (California)Work on state-of-the art Fetch Unit architecture design serving both general purpose as well as AI processing element needs. |
RTL |
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更多信息 |
Software EngineerPlay a critical role in porting open source packages to our processor platform, the new chip being designed by Tachyum |
软件 |
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Technical Support & Field Application EngineerSupport Tachyum customers and potential customers to easily use and adopt our emulation systems |
软件 |
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Toolchain EngineerPlay a critical role in development of debugging tools for the new chip being designed by Tachyum. |
软件 |
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UEFI Developer
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软件 |
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Senior Design Architect - InterfaceSpecify, design, and deliver a high-speed chip-to-chip interface |
RTL |
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Senior Design Architect - Interface (California)Specify, design, and deliver a high-speed chip-to-chip interface |
RTL |
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Senior Design Engineer – Memory SubsystemInterface and enhancements of an advanced DRAM control block |
RTL |
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Test Engineer / Test Automation EngineerCreate, analyze, and implement software test plans and strategies. |
测试 |
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更多信息 |
Junior Linux Kernel developerImplement new or optimize the old features in Linux Kernel. (suitable also for talented graduates) |
软件 |
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GCC Compiler EngineerDrive and deliver GCC on new platform with new computational mechanism |
软件 |
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更多信息 |
GCC Compiler Engineer (California)Drive and deliver GCC on new platform with new computational mechanism |
软件 |
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更多信息 |
关于Tachyum
Tachyum 正在通过其最近推出的旗舰产品改变人工智能、高性能计算、公共和私有云数据中心市场。 Prodigy神童是世界上第一款通用处理器,将 CPU、GPGPU 和 TPU 的功能统一到一个处理器中,为专业和通用计算提供行业领先的性能、成本和能效。当在超大规模数据中心配置 Prodigy神童 处理器时,它们使所有人工智能、高性能计算和通用应用程序能够在一个硬件基础设施上运行,每年为公司节省数十亿美元。