Senior Design Engineer – PCIe Interface (Santa Clara, CA)

    Pracoviská:

    • Santa Clara, Kalifornia

    Oblasti:

    • Hardware
    Všetky pozície

    Responsibilities

    • Working with a small team to implement, debug, and verify a high-performance PCIe interface
    • Build the infrastructure to support PCIe during FPGA emulation and bringup

    Qualifications

    • Requires 10 to 15 years of applicable experience (bright individuals with lower experience can also apply)
    • Experience and background with PCIe controller/device design
    • Familiarity with bus traffic analyzers and logic analyzers
    • Familiarity with data eye and BER analysis
    • Verilog / System Verilog / Synthesis / STA / CDC / Lint experience

    Compensation Range

    The base salary range is $130 000 to $280 000. Your salary will be determined based on your experience and specific skillset.

    You will also be eligible for equity and benefits.

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    Všetky pozície