Senior Design Engineer – Coherent Interconnect (Santa Clara, CA)

Locations:

  • Santa Clara, CA

Job fields:

  • Hardware
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Responsibilities

  • Working with a small team to implement, debug, and verify Prodigy’s high-speed chip-to-chip interface
  • Building the infrastructure to support bringup and debug in FPGAs and silicon
  • Working with the SW team to model and optimize system performance

Qualifications

  • Requires 10 to 15 years of applicable experience (bright individuals with lower experience can also apply)
  • Experience with shared-memory and NUMA
  • Experience with high-speed interconnect
  • System performance modelling experience a plus
  • Verilog / System Verilog / Synthesis / STA / CDC / Lint experience

Benefits

  • Competitive salary and benefits package.
  • Opportunities for professional development and advancement.
  • International environment and further career progression.
  • Getting in touch with bleeding edge technology.
  • Flexible working hours
  • Work-life balance.
  • Collaborative and supportive work environment.

If you meet the qualifications and are interested in this opportunity, please submit your resume and cover letter. We look forward to hearing from you!

Compensation Range

The base salary range is $130,000 to $280,000. Your salary will be determined based on your experience and specific skillset.

You will also be eligible for equity and benefits.

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