Design Engineer 1

Locations:

  • Santa Clara, CA
  • Las Vegas, NV

Job fields:

  • Design
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What you'll be doing

  • Working on state of the art data cache architecture serving high performance AI processing elements.

Skills required

  • We are looking for 2 to 4 years of experience in the following areas (will consider bright candidates with lower experience)
  • Understanding of cache pipeline design and microarchitecture
  • Logic design experience with state of the art deep submicron technologies specifically low power design techniques
  • Strong understanding of processor and computer architecture
  • Verilog / system Verilog / Synthesis / STA (Static timing analysis) / CDC / LINT
  • Knowledge of programming languages C, scripting (Perl / shell / python / awk) is a plus

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