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AI and Machine Learning Algorithms Architect / Researcher
Analyze algorithmic and architecture options to find the optimal design points
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BMC SW engineer
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Build and Release Engineer (Linux)
Oversee and ensure build and release timeline.
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CPU Performance Engineer
Contribute to architectural planning and design with development engineers
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Design Engineer 1
Work on state of the art data cache architecture serving high performance AI processing elements.
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Design Engineer 2
Work on the state-of-art AI processor architecture.
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Design Verification Engineer
Drive the effort of closing coverage holes and resolving them to closure with designers.
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Design Verification Engineer 1
Help in test plan development for block and Chip level and drive it to closure by capturing test plan items in tests.
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Design Verification Engineer 2
Write assertions, cover properties, cover points.
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Digital Design Engineer
Work on the state-of-art AI processor architecture.
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FreeBSD Kernel Engineer
Drive and deliver FreeBSD kernel on new platform with new proprietary computational mechanism
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GCC Compiler Engineer
Drive and deliver GCC on new platform with new computational mechanism
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Linux Kernel Engineer
Drive and deliver Linux on new platform with new proprietary computational mechanism
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Linux Kernel Networking Specialist (drivers)
Create, adjust and maintain various specific network Linux Kernel drivers.
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LLVM Compiler Engineer
Port LLVM on new platform with new computational mechanism.
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Physical Design Engineer
Work with RTL designers to achieve PPA goals and suggest appropriate tradeoffs
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Senior ASIC Logic & Physical Design Engineer
Drive and deliver gate level netlist and placement in line with new computational mechanism
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Senior ASIC Logic & Physical Design Engineer
Drive and deliver gate level netlist and placement in line with new computational mechanism
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Senior Design Engineer 1
Work on Cache Directory block.
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Senior Design Engineer 2
Work on Execution Unit .
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Senior Design Engineer 3
Work on high performance L2 Cache unit serving the needs of state-of-the art AI processing elements.
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Senior Design Engineer 4
Work on state-of-the art Fetch Unit architecture design serving both general purpose as well as AI processing element needs.
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Senior System on Chip Hardware Architect
Propose, drive and write architecture specifications
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SK Sales Manager
Create sales strategies, arrange business meetings with prospective clients.
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Software Engineer
Play a critical role in porting open source packages to our processor platform, the new chip being designed by Tachyum
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Software Engineer - Debugging Tools
Play a critical role in development of debugging tools for the new chip being designed by Tachyum.
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System Engineer
Maintain internal and external company IT infrastructure
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UEFI Developer
About Tachyum
Tachyum is disrupting data center, HPC, and AI markets by providing the world’s first Universal Processor, with industry leading performance, cost and power, across all three computational domains, while, at the same time, enabling data centers to exceed the capacity of the human brain.
Tachyum, Co-founded by Dr. Radoslav Danilak, and its flagship product Prodigy, begins high-rate production in 2021, with software emulations and a FPGA-based emulator available to early adopters. It is targeting a $50B market, growing at 20% per year.
With data centers currently consuming over 3% of the planet’s electricity, predicted to be 10% by 2025, the ultra-low power Prodigy Universal Processor is critical, if we want to continue doubling worldwide data center capacity every 4 years.
Tachyum is one of the founding members of I4DI (Innovations for Digital Infrastructure), which will build the world’s fastest AI supercomputer in Slovakia showcasing Prodigy.