Presse­mitteilungen

LAS VEGAS, May 6, 2025 – Tachyum^® today announced that it has successfully demonstrated System Management on its Prodigy^® Universal Processor, validating its ability to run system-wide functions such as power management, system hardware control, or proprietary OEM-designed code.

System Management covers privileged System Management Mode (SMM) level, dedicated System Management Interrupts (SMI) and SMM firmware. In x86-based processors, SMM exists as a special-purpose operating mode with a higher effective privilege level than the hypervisor. SMM is used only by SMM firmware, not by application software or general-purpose systems software.

LAS VEGAS, April 15, 2025 – Tachyum^® today announced its membership in Ultra Accelerator Link™ (UALink™), a consortium of industry-leading hyperscalers and AI infrastructure providers, to ensure the Prodigy^® Universal Processor is compatible with emerging accelerator ecosystems.

UALink is a high-speed accelerator interconnect technology that advances next-generation AI/ML cluster performance. The group’s goal is to define and establish an open, interoperable industry standard for high-performance computing connections in scale-up AI environments that enable AI accelerators to communicate more effectively.

LAS VEGAS, 27 March, 2024 –Tachyum^® today announced that it has successfully enabled DRAM Failover correct system on its Prodigy Universal Processor, demonstrating enhanced reliability for even larger-scale AI and HPC applications even in the case of DRAM chip failures.

Tachyum’s DRAM Failover is an advanced memory error correction technology that improves the reliability of DRAM and provides a higher level of protection than traditional Error Correction Code (ECC). DRAM Failover can correct multi-bit errors within a single memory chip or across multiple memory chips, allowing continued memory operation in the event of device-level faults in memory. With DRAM Failover, even a whole DRAM chip failure can be tolerated without affecting the system and applications.

LAS VEGAS, February 18, 2025 –Tachyum^® today announced that software distribution for the Prodigy^® Universal Processor has entered the release candidate (RC1) testing phase. This completely integrated software stack and package is now available to selected early adopters and customers.

The company’s software distribution package combines key advancements to deliver optimal performance for Prodigy. Notable updates to RC1 include the inclusion of GCC 14.2, Linux 6.12, LLVM 19, FreeBSD 14.1 and QEMU 9.11. The package also provides users with an optimization guide and performance-tuning tools to ensure maximum efficiency.

LAS VEGAS, January 21, 2025 –Tachyum^® today announced that it has ported all four of the National Institute of Standards and Technology’s (NIST) quantum-safe algorithms across Prodigy^® software distributions to ensure data center deployments leveraging the company’s universal processor are quantum-resistant and future-proofed for data security.

Quantum computing is a powerful emerging technology that enables much higher performance for certain algorithms, such as optimization and molecular simulation. Quantum computers operate in fundamentally different ways from traditional computers and pose a threat to data security with Shor’s algorithm – a quantum-computing algorithm that is predicted to break current data security processes within the next 5 years.

LAS VEGAS, December 17, 2024 –Tachyum^® today announced that it has released a 1,600-page Performance Optimization Manual for its Prodigy^® Universal Processor FPGA hardware.

Tachyum’s Prodigy Performance Optimization Manual provides detailed information on how to fully benefit from the performance features that are built into Prodigy. It includes the required design guidelines for the development of high-performance software for a broad range of applications, including cloud, AI, and HPC.

The manual outlines Prodigy’s revolutionary new Universal Processor microarchitecture, and intrinsic functions as well as processor instructions, throughputs, and latencies. Tachyum has also included Prodigy’s performance counters, which enable performance monitoring and analysis across a wide array of run-time events.

LAS VEGAS, December 3, 2024 –Tachyum^® today announced that it has successfully validated integer matrix operations running on its Prodigy^® Universal Processor FPGA hardware.

The Tachyum team tested and verified vector operations, 8-bit integer matrix operations for image classification using a Resnet model with custom convolution and linear operators on Prodigy.

Tachyum’s Prodigy was designed to handle matrix and vector processing from the ground up. Among Prodigy’s vector and matrix features are support for a range of data types (FP64, FP32, TF32, BF16, Int8, FP8, FP4 and TAI); 2x1024-bit vector units per core; AI sparsity and super-sparsity support; and no penalty for misaligned vector loads or stores when crossing cache lines. This built-in support offers high performance for AI training and inference workloads, increases performance, and reduces memory utilization.

LAS VEGAS, November 19, 2024 –Tachyum^® today announced its membership in the Slovak-Saudi Chamber of Commerce (SSCC) as part of its commitment to create and expand business connections throughout Middle Eastern markets. This move closely follows several other association agreements that Tachyum has entered to further develop partnerships with various public and private sector entities that support economic growth, trade and investments with the respective regions.

SSCC is a non-profit organization established in cooperation with the Slovak Embassy in Riyadh – Saudi Arabia’s capital and main financial hub. The mission of SSCC is to develop and deepen bilateral trade relations between Slovakia and Saudi Arabia while contributing to improving annual economic relations between the EU and the MEA.

LAS VEGAS, November 12, 2024 –Tachyum^® today announced that it has successfully demonstrated enhanced hardware-assisted sampling running on its Prodigy^® Universal Processor FPGA Emulation System, marking a breakthrough in the application of advanced compiler optimizations.

Compiler optimizations are critical for enhancing performance, reducing response times, minimizing storage footprints, and improving the overall Total Cost of Ownership (TCO) across a wide variety of modern computational workloads. Among the most powerful techniques employed by modern compilers are link-time optimizations (LTO), profile-guided optimizations (PGO) and feedback-directed optimizations (AutoFDO). These techniques leverage runtime data to fine-tune software performance, achieving results beyond what static optimizations can deliver.

LAS VEGAS, October 29, 2024 – Tachyum^® today announced its participation in the China International Semiconductor Expo (IC CHINA), an exclusive exhibition taking place in the China National Convention Center in Beijing November 18-20.

For Europe, China is the largest business partner in the world by a factor close to 2x compared to any other business partner of the EU. Tachyum has Tachyum s.r.o. in Slovakia and Tachyum Czech Republic, s.r.o. in Europe. Participating in EUCCC and IC China Tachyum fulfills stated support of European Union efforts in the semiconductor space and technological sovereignty as well as helping the Slovak government efforts to search for further opportunities for economic cooperation with China.