Our Company

  • Dr. Radoslav Danilak

    Dr. Radoslav Danilak

    Co-founder and CEO

    “Rado” Danilak has over 25 years of industry experience and over 100 patents designing state-of-the-art processing systems. In 2016 he founded Tachyum to disrupt markets by solving the processing performance plateau of nanometer class chips.

    Rado was founder and CEO of Skyera, a supplier of ultra-dense solid-state storage systems, acquired by WD in 2014. As CEO he won the 2013 Gold Tech Awards Circle for Emerging Company Executive of the Year. At Wave Computing, Rado architected the 10GHz Processing Element of deep learning DPU.

    Rado was cofounder and CTO of SandForce acquired by LSI in 2011 for $377M. Rado pioneered enterprise and consumer MLC flash controllers and solved endurance limited by device physics. He was a chipset and GPU architect at nVidia, a CPU architect at Nishan Systems and Toshiba, and chief architect of 64b x86 CPU at Gizmo Tech.

    The Microprocessor Report said Rado “has developed some interesting ideas that show significant promise in delivering performance better than that of the leading processors expected in near future… these ideas are likely to appear in other next-generation instruction sets, including the HP/Intel IA-64.”

    Dr. Danilak is U.S. citizen born in Slovakia, and serves on the Slovak government’s Innovation Advisory Board. He is a member of the IDC Technical Computing Advisory Panel, the Forbes Technology Council, a contributor to TechTarget, and a member of IEEE. He holds a Ph.D in Computer Science and an MS in Electrical Engineering from the TUKE Slovakia, where he taught compiler courses.

  • Rodney Mullendore

    Rodney Mullendore

    Co-founder and chief architect

    Rod has over 30 years experience designing advanced networking and storage processing chips and systems. He holds 28 patents and has a strong track record designing complex storage and networking chips and systems. Rod was cofounder of Skyera where he architected and implemented ASIC and FPGA-based flash controllers for two All-Flash enterprise-grade storage systems.

    Rod was chief hardware architect at SandForce, which was acquired by LSI in 2011. He wrote the hardware architecture and micro architecture documents for the company’s first 2 chips, which solved a major Flash endurance limitation, caused by the device physics of multi-level flash memory cells.

    Rod was a cofounder of Nishan Systems, which developed Storage over IP switches which allowed Fibre Channel traffic to be transported over Ethernet and IP networks. His design experience includes hardware compression, FC and GE MAC, Hypertransport, DDR controllers, frame parsers and generators, and TCP/IP offload hardware. He co-architected a Storage Area Network switch/router which supported Fibre Channel, Gigabit Ethernet, iFCP, and iSCSI interfaces.

    At Sandia National Labs, Rod worked on the design of the Trident II warhead telemetry. He designed the logic for 3 gate arrays and a radiation hardened chip. He directed a team of engineers in hardware design for 2 classified projects. His duties included generation of design specifications, test plans, and presentations to the Department of Energy. Rod is a U.S. citizen and holds Masters and Bachelor of Electrical Engineering degrees from the University of Wisconsin.

  • Igor Shevlyakov

    Igor Shevlyakov

    Co-founder and VP software engineering

    Igor brings over 20 years of expertise in compilers, system software and tools development.

    At Skyera, he worked on performance optimization of the flash-translation layer of Skyera’s storage systems. Following Skyera’s acquisition Igor remained at HGST to help to integrate the new technology into their product line. Prior to Skyera, Igor led compiler and system tools development at MicroUnity, which designed a broadband microprocessor BroadMX. MicroUnity’s innovations in SIMD processing were licensed by all microprocessor industry leaders. Before that, he was a part of WindRiver’s GCC compiler and GNU toolchain team, working on code generation for several processor architectures.

    In Russia, Igor led system tools development teams on projects contracted by Nortel Networks, Information Satellite Systems and other clients. As one of the founders of Excelsior’s JET project, Igor had spearheaded the development of the AOT Java compiler, which continues to sell 20 years after its launch.

    Igor, a U.S. citizen born in Russia, holds a MS in Mathematics and Computer Science from the Novosibirsk State University of Novosibirsk, Russia.

  • Ken Wagner

    Ken Wagner

    Co-founder and VP Business Development

    Tachyum was cofounded by Ken Wagner, who is also a co-founder of Wave Computing (a machine learning company), Silicon Analytics (a chip synthesis tools company), and Theseus Logic (a clockless logic company).

    His previous experience in Aerospace & Defense includes a stint at Honeywell Systems & Research Center as a Project Chief in the Advanced Systems Division, where he developed simulators for astronaut zero-G training, and co-founded the Anti-Submarine Warfare Research Office. Wagner also worked for Singer-Link, a flight simulation company, as their Marketing Manager for Fighter Programs.

    He is a US Citizen, who served as a USAF Pilot (49th Fighter Interceptor Squadron, where he was an Instructor Pilot and Squadron Test Pilot), and as an A-10 Pilot with the Air National Guard.

    He graduated from Stevens Institute of Technology in Hoboken N.J., with a Bachelor of Engineering Degree, and is the Principal Inventor of a US Patent for a Covert Radionavigation System.

  • Elena Zokhidova

    Elena Zokhidova

    VP of Finance

    As VP of Finance at Tachyum, Elena oversees all aspects of the company’s accounting, finance, treasury, tax and human resources. Elena brings more than 15 years of financial leadership experience to the company. During her career, Elena worked with public and high-growth pre-IPO technology companies.

    Prior to Tachyum, Elena served for two years as GeForce financial business controller at Nvidia, where she was responsible for financial planning, reporting and compliance.

    Previously, Elena spent six years at Advanced Micro Devices, including four years as financial business controller of semi-custom and enterprise business units, and held various roles in corporate financial planning and external financial reporting.

    Prior to that, Elena spent six years at PricewaterhouseCoopers in San Jose serving large public and high- growth pre-IPO technology companies.

    Elena graduated from Tashkent Financial Institute in Uzbekistan. She is a Certified Public Accountant, licensed in California.

  • Chi To

    Chi To

    Director of Systems Engineering

    Chi To has over 30 years of experience in designing complex, high performance, fault tolerance, low power, low cost systems from conceptual planning to full mass production.

    At Tidal Systems/Micron (Tidal Systems was acquired by Micron in 2015), Chi was a Principal Designer for its FPGA emulation system and reference designs with NVME flash controllers to support volume production. At Skyera, Chi was a Principal Designer for flash array storage systems.  At Sandforce, Chi was a Lead Board Design for its FPGA Emulation system and reference designs for SATA flash controllers.

    At Luminous Networks and Adtran, Chi was a Principal Designer for switches, routers, and edge access devices for IEEE802.17 RPR, Ethernet, and OTN network protocols. Chi also spent his early career as a test and system designer for commercial and military aircraft flight avionics, ground station receivers, radar and ultrasound medical systems at Boeing, Honeywell, Siemens Medical Ultrasound division, and Lockheed Martin Space division.

    Chi holds a Master’s degree in Electrical Engineering from the University of Washington.

  • Stephen Dilbeck

    Stephen Dilbeck

    Senior Director, System on Chip

    With nearly three decades of professional experience, Steve has a deep understanding of the chip design process from concept to production. With a specialization in ultra-high frequency custom and PnR design, he is responsible for overseeing the customer-owned tooling (COT) process including managing the physical design closure of the company’s Prodigy Universal Processor Chip.

    Steve comes to Tachyum after five years of working at Wave Inc. as that company’s Senior Director of SOC Design. There, he managed and defined the necessary workflows and methodologies needed to increase productivity, reduce risk, and meet aggressive development schedules of their ultra-high frequency product. The Wave’s AI Data Flow Processing Unit, whose architecture was invented by Dr. Danilak as a Wave contractor, achieved 10GHz at the 16nm process node.

    Prior to Wave, Steve worked as a Director of Physical and Circuit Design at Skyera Inc., where he was responsible for all physical implementation methodologies and flows of the company’s 28nm, 4Ghz multicore processor.

    Previous experience includes design leadership positions at Sigma Designs, SandForce, RMI Corporation and PMC-Sierra/SwitchOn, among others. Steve received his engineering education at the University of California, Berkeley in Electrical Engineering and Computer Science.

  • Krishna Thatipelli

    Krishna Thatipelli

    Senior Director of Hardware Design Engineering

    Krishna is a seasoned professional with strong technical and management skills in CPUs and ASIC development. He has more than 20 years of experience successfully delivering many high-performance microprocessors/ASICs across a spectrum of processors, such as Intel and AMD x86 multicore CPUs, next-generation ARM cores and SPARC CPUs.

    He worked at Cavium / Marvell Semiconductors as the company’s technical leader and senior manager, front end microarchitecture and RTL development for the Memory Subsystem of its next-generation flagship server processor. At Intel, Krishna developed and led the microarchitecture development x86 core of Intel next generation multicore CPU. He has also served in senior management roles at companies such as AMD, where he led RTL micro-architecture development X86 Opteron CPU; and Sun Microsystems, where he led micro-architecture and RTL of Out-Of-Order High-End SPARC CPU.

    His innovation has resulted in being awarded several patents for technologies such as CPU architecture and high-performance CPU pipeline designs. Krishna holds a Master of Science/Technology degree from the National Institute of Technology (Regional Engineering College) in Warangal, India.